GPIO配置
GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;
关闭所有epwm基准时钟
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
1 配置TB
●时间基准状态寄存器
EPwm4Regs.TBSTS.all=0
●相位寄存当检测到同步输入脉冲时，相位寄存器的值装载到计数寄存器
EPwm4Regs.TBPHS.half.TBPHS=0;
●时间基准计数器清零，即清除计数器，TBCTR相当于计数器
EPwm4Regs.TBCTR=0;
●周期寄存器，设置PWM周期
EPwm4Regs.TBPRD=SP;
●时间基准控制寄存器
1.计时器计数模式
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
2.相位装载模式
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
3.周期寄存器的映射寄存器加载条件
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
4.EPWMxSYNCO信号源选择
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
5.时钟分频：TBCLK=SYSCLKOUT/(2*HSPCLKDIV)(2^CLKDIV)
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
2 配置CC
●比较控制寄存器
1.CMPA/B影子寄存器的加载模式
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
2.在选定映射模式下，选择加载方式
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
●比较寄存器A/B，改变可改变比较点，调整输出占空比
EPwm4Regs.CMPA.half.CMPA =400;
EPwm4Regs.CMPB=0;
3 配置AQ
●输出比较方式，控制发生比较事件前后EPWM的电平
例：EPwm4Regs.AQCTLA.all=0x60;
EPwm4Regs.AQCTLA.PRD/CAU/CBU/CAD/CBD/ZRO=AQ_CLEAR/SET;
●软件强制控制
EPwm4Regs.AQSFRC.all=0;
EPwm4Regs.AQCSFRC.all=0;
4 死区DB
●死区控制
EPwm4Regs.DBCTL.all=0xb;
●上升/下降沿延迟DBRED/DBFED，9-0共10位
EPwm4Regs.DBRED=0;//上升沿延时=0
EPwm4Regs.DBFED=0;//下降沿延时=0
5 故障TZ
EALLOW;
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_HI;//00高阻
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_HI;
EPwm1Regs.TZFRC.bit.OST = 1;//强制生成一次性错误事件并设定TZFLG[OST]位
EDIS;
6 斩波
7 事件触发ET
●事件触发选择，选择中断、ADC在什么时候触发；SOCA、SOCB脉冲生成
EPwm4Regs.ETSEL.all=0;
打开所有epwm基准时钟
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
EPWM中断设置
●中断入口地址
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT = &epwm1_timer_isr;
EDIS;
●初始化EPWM
1、关闭所有epwm基准时钟（接下来要配置参数了）
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
EDIS;
2、选择EPWMxSYNCO信号源 00 EPWMxSYNC
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
3、当EPWMxSYNCI输入信号产生，将TBPHS加到TBCTR
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
4、相位寄存器
EPwm1Regs.TBPHS.half.TBPHS = 100;
5、周期、计数模式
EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
5、中断触发配置
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
6、开epwm基准时钟
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
●开CPU中断
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = PWM1_INT_ENABLE;
EINT; // Enable Global interrupt INTM
ERTM;
中断服务函数
interrupt void epwm1_timer_isr(void)
{
EPwm1TimerIntCount++;
EPwm1Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
PWM初始化例子
//PWM初始化
//这些定义的数据都在Include——DSP2833x_EPwm_defines.h里
void Init_PWM1()
{
EPwm1Regs.TBPRD = PrdCnst;//设置TB周期
EPwm1Regs.TBPHS.half.TBPHS = 0x0;//同步事件发生，此值加载到CTR
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.CMPA.half.CMPA = Cnst;//CMPA初始化
EPwm1Regs.CMPB = Cnst;
//控制信号选择
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;//增减模式
EPwm1Regs.TBCTL.bit.PHSEN = 1;//同步使能 本程序中通过SWFSYNC软件强制同步；
//时钟同步输入/出信号仅由EPWM1引脚产生
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;//0 TBPRD当TBCTR=0时，其从映射寄存加载
EPwm1Regs.TBCTL.bit.SYNCOSEL = 0x0;//EPWMxSYNC
//TBCLK=SYSCLK/(2*HSPCLKDIV * 2^CLKDIV)
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0x0;//时钟设置TBCLK
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.PHSDIR = 1;//同步后计数器递增计数
//CC设置，产生计数器匹配信号，比较操作使能shadow模式
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;//0
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
//当CTR=0/PRD时，加载shadow的值并生效
//这个的作用是在CMPA/B发生变化时加载新的值的时间点
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;//0x0
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
//AQ设置，EPWM_A B产生互补的信号
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; //CTR=A且上升的时候PWM输出1
EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; //CTR=A且下降的时候PWM输出0
EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;
EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;
//DB设置，A上升沿延时不取反 B下降沿延时取反
EPwm1Regs.DBCTL.bit.IN_MODE = 0x2;//A上升沿延时 B下降沿延时
EPwm1Regs.DBCTL.bit.POLSEL = 0x2;//A不取反 B取反
EPwm1Regs.DBCTL.bit.OUT_MODE = 0x2;//AB全部用加了延时的输出
EPwm1Regs.DBFED = FED_Cnst;//上升沿死区时间 FED=DBFED*TBCLK
EPwm1Regs.DBRED = RED_Cnst;//下降沿死区时间
/*
//TZ模块，外部发生错误时，即TZn有输入时，PWMA/PWMB输出强制为高阻
//外部发生错误时，即TZn有输入时，执行一次指定动作，并且OSTFLG置位
EALLOW;
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_HI;//00高阻
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_HI;
EPwm1Regs.TZFRC.bit.OST = 1;//强制生成一次性错误事件并设定TZFLG[OST]位
EDIS;
*/
EPwm1Regs.ETSEL.bit.INTEN = 0;//不允许ET模块产生中断
}下载本文
