REV.F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

a

High Precision, Wideband RMS-to-DC Converter

AD637

The AD637 is available in two accuracy grades (J and K) for commercial (0°C to 70°C) temperature range applications;two accuracy grades (A and B) for industrial (–40°C to +85°C)applications; and one (S) rated over the –55°C to +125°C tem-perature range. All versions are available in hermetically sealed,14-lead side brazed ceramic DIPs as well as low cost cerdip packages. A 16-lead SOIC package is also available.

PRODUCT HIGHLIGHTS

1.The AD637 computes the true root-mean-square, mean-square, or absolute value of any complex ac (or ac plus dc)input waveform and gives an equivalent dc output voltage.The true rms value of a waveform is more useful than an average rectified signal since it relates directly to the power of the signal. The rms value of a statistical signal is also related to the standard deviation of the signal.

2.The AD637 is laser wafer trimmed to achieve rated

performance without external trimming. The only external component required is a capacitor that sets the averaging time period. The value of this capacitor also determines low-frequency accuracy, ripple level, and settling time.3.The chip select feature of the AD637 permits the user to power down the device during periods of nonuse, thereby decreasing battery drain in remote or hand-held applications.4.The on-chip buffer amplifier can be used either as an input buffer or in an active filter configuration. The filter can be used to reduce the amount of ac ripple, thereby increasing the accuracy of the measurement.

PRODUCT DESCRIPTION

The AD637 is a complete high accuracy monolithic rms-to-dc converter that computes the true rms value of any complex wave-form. It offers performance that is unprecedented in integrated circuit rms-to-dc converters and comparable to discrete and modular techniques in accuracy, bandwidth, and dynamic range.A crest factor compensation scheme in the AD637 permits mea-surements of signals with crest factors of up to 10 with less than 1% additional error. The circuit’s wide bandwidth permits the measurement of signals up to 600 kHz with inputs of 200 mV rms and up to 8 MHz when the input levels are above 1V rms.As with previous monolithic rms converters from Analog Devices,the AD637 has an auxiliary dB output available to the user. The logarithm of the rms output signal is brought out to a separate pin, allowing direct dB measurement with a useful range of 60dB. An externally programmed reference current allows the user to select the 0 dB reference voltage to correspond to any level between 0.1 V and 2.0 V rms.

A chip select connection on the AD637 permits the user to de-crease the supply current from 2.2 mA to 350µA during periods when the rms function is not in use. This feature facilitates the addition of precision rms measurement to remote or hand-held applications where minimum power consumption is critical. In addition when the AD637 is powered down the output goes to a high impedance state. This allows several AD637s to be tied together to form a wideband true rms multiplexer.

The input circuitry of the AD637 is protected from overload voltages that are in excess of the supply levels. The inputs will not be damaged by input signals if the supply voltages are lost.FEATURES High Accuracy

0.02% Max Nonlinearity, 0V to 2V RMS Input 0.10% Additional Error to Crest Factor of 3Wide Bandwidth

8MHz at 2V RMS Input 600kHz at 100mV RMS Computes:True RMS Square

Mean Square Absolute Value

dB Output (60dB Range)

Chip Select/Power-Down Feature Allows:Analog “Three-State” Operation

Quiescent Current Reduction from 2.2mA to 350␮A Side Brazed DIP, Low Cost Cerdip and SOIC

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700www.analog.com Fax: 781/326-8703© Analog Devices, Inc., 2002

AD637–SPECIFICATIONS (@ 25؇C, and ؎15 V dc unless otherwise noted.)

REV. F

–2–

AD637

REV. F –3–

AD637J/A AD637K/B

AD637S

Model

Min

Typ Max

Min Typ

Max

Min

Typ

Max

Unit

CHIP SELECT PROVISION (CS)RMS “ON” Level Open or 2.4 V < V C < +V S Open or 2.4 V < V C < +V S

Open or 2.4 V < V C < +V S

RMS “OFF” Level V C < 0.2 V V C < 0.2 V V C < 0.2 V I OUT of Chip Select CS “Low”101010µA

CS “High”

Zero

Zero

Zero

On Time Constant 10 µs + ((25 k Ω) ϫ C AV )10 µs + ((25 k Ω) ϫ C AV )10 µs + ((25 k Ω) ϫ C AV )Off Time Constant 10 µs + ((25 k Ω) ϫ C AV )10 µs + ((25 k Ω) ϫ C AV )10 µs + ((25 k Ω) ϫ C AV )POWER SUPPLY

Operating Voltage Range ±3.0

؎18؎3.0

؎18؎3.0

؎18V Quiescent Current 2.23 2.23 2.23mA Standby Current 350450

350450

350450

µA

TRANSISTOR COUNT

107

107

107

NOTES 1

Accuracy specified 0–7 V rms dc with AD637 connected as shown in Figure 2.2

Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V.3

Error vs. crest factor is specified as additional error for 1 V rms.4

Input voltages are expressed in volts rms. % are in % of reading.5

With external 2 k Ω pull-down resistor tied to –V S .

Specifications shown in bold are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V dc Internal Quiescent Power Dissipation . . . . . . . . . . . . 108 mW Output Short Circuit Duration . . . . . . . . . . . . . . . . .Indefinite Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 10 secs) . . . . . . . . 300°C Rated Operating Temperature Range

AD637J, K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C AD637A, B . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C AD637S, 5962-63701CA . . . . . . . . . . . –55°C to +125°C

ORDERING GUIDE

Temperature Package Package Model

Range

Description

Option AD637AR –40°C to +85°C SOIC R-16AD637BR –40°C to +85°C SOIC R-16AD637AQ –40°C to +85°C Cerdip Q-14AD637BQ –40

°C to +85°C Cerdip

Q-14AD637JD 0°C to 70°C Side Brazed Ceramic DIP D-14AD637JD/+0°C to 70°C Side Brazed Ceramic DIP D-14AD637KD 0°C to 70°C Side Brazed Ceramic DIP D-14AD637KD/+0°C to 70°C Side Brazed Ceramic DIP D-14AD637JQ 0°C to 70°C Cerdip Q-14AD637KQ 0°C to 70°C Cerdip Q-14AD637JR

0°C to 70°C SOIC R-16AD637JR-REEL 0°C to 70°C SOIC R-16AD637JR-REEL70°C to 70°C SOIC R-16AD637KR 0°C to 70°C

SOIC

R-16AD637SD

–55°C to +125°C Side Brazed Ceramic DIP D-14AD637SD/883B –55°C to +125°C Side Brazed Ceramic DIP D-14AD637SQ/883B –55°C to +125°C Cerdip Q-14AD637SCHIPS –55°C to +125°C Die 5962-63701CA *

–55°C to +125°C

Cerdip

Q-14

*A standard microcircuit drawing is available.

Figure 1.Simplified Schematic

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection.Although the AD637 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

AD637

REV. F

–4–

REV. F –5–

AD637

PIN CONFIGURATIONS

14-Lead DIP

BUFF IN NC COMMON OUTPUT OFFSET

CS DEN INPUT dB OUTPUT

BUFF OUT V IN NC

+V S –V S

RMS OUT C AV

16-Lead SOIC

BUFF OUT V IN NC

+V S

–V S RMS OUT C AV NC

14-Lead DIP

Pin No.Mnemonic Description 1

BUFF IN Buffer Input 2, 12NC

No Connection 3COMMON

Analog Common 4OUTPUT OFFSET Output Offset 5CS

Chip Select

6DEN INPUT Denominator Input 7dB OUTPUT dB Output

8C AV

Averaging Capacitor Connection 9RMS OUT rms Output 10–V S

Negative Supply Rail

11+V S Positive Supply Rail 13V IN

Signal Input 14

BUFF OUT

Buffer Output

PIN FUNCTION DESCRIPTIONS

16-Lead SOIC

Pin No.Mnemonic Description 1

BUFF IN Buffer Input 2, 8, 9, 14NC

No Connection 3COMMON

Analog Common 4OUTPUT OFFSET Output Offset 5CS

Chip Select

6DEN INPUT Denominator Input 7dB OUTPUT dB Output

10C AV

Averaging Capacitor Connection 11RMS OUT rms Output 12–V S

Negative Supply Rail

13+V S Positive Supply Rail 15V IN

Signal Input 16

BUFF OUT

Buffer Output

AD637

REV. F

–6–STANDARD CONNECTION

The AD637 is simple to connect for a majority of rms measure-ments. In the standard rms connection shown in Figure 2, only a single external capacitor is required to set the averaging time constant.In this configuration, the AD637 will compute the true rms of any input signal. An averaging error, the magnitude of which will be dependent on the value of the averaging capacitor,will be present at low frequencies.For example, if the filter capacitor, C AV , is 4 µF, this error will be 0.1% at 10 Hz and increases to 1% at 3 Hz.If it is desired to measure only ac signals, the AD637 can be ac coupled through the addition of a nonpolar capacitor in series with the input as shown in Figure 2.

Figure 2.Standard RMS Connection

The performance of the AD637 is tolerant of minor variations in the power supply voltages; however, if the supplies being used exhibit a considerable amount of high frequency ripple it is advisable to bypass both supplies to ground through a 0.1µF ceramic disc capacitor placed as close to the device as possible.The output signal range of the AD637 is a function of the sup-ply voltages, as shown in Figure 3. The output signal can be used buffered or nonbuffered depending on the characteristics of the load. If no buffer is needed, tie the buffer input (Pin 1) to common. The output of the AD637 is capable of driving 5mA into a 2k Ω load without degrading the accuracy of the device.

SUPPLY VOLTAGE – DUAL SUPPLY – V

20

15

0؎18

؎5M A X V O U T – V o l t s 2k ⍀ L o a d

؎1010

5

؎15؎3

Figure 3.AD637 Max V OUT vs. Supply Voltage

FUNCTIONAL DESCRIPTION

The AD637 embodies an implicit solution of the rms equation that overcomes the inherent limitations of straightforward rms computation. The actual computation performed by the AD637follows the equation

V rms Avg V V rms IN =

2Figure 1 is a simplified schematic of the AD637, subdivided into four major sections: absolute value circuit (active recti-fier), square/divider, filter circuit, and buffer amplifier. The input voltage V IN , which can be ac or dc, is converted to a

unipolar current I1 by the active rectifier A1, A2. I1 drives one input of the squarer/divider, which has the transfer function

I I I 412

3

=

The output current of the squarer/divider I4 drives A4, which forms a low-pass filter with the external averaging capacitor. If the RC time constant of the filter is much greater than the longest period of the input signal, then A4’s output will be proportional to the average of I4.The output of this filter amplifier is used by A3 to provide the denominator current I3, which equals Avg. I4and is returned to the squarer/divider to complete the implicit rms computation

I Avg I I I rms

412

41=

=and

V OUT = V IN rms

If the averaging capacitor is omitted, the AD637 will compute the absolute value of the input signal. A nominal 5pF capacitor should be used to ensure stability. The circuit operates identically to that of the rms configuration except that I3 is now equal to I4, giving

I I I I I 41

24

41

=

=The denominator current can also be supplied externally by pro-viding a reference voltage, V REF , to Pin 6. The circuit operates identically to the rms case except that I3 is now proportional to V REF . Thus:

I Avg

I I 412

3

=and

V V V O IN DEN

=

2

This is the mean square of the input signal.

CHIP SELECT

The AD637 includes a chip select feature that allows the user to decrease the quiescent current of the device from 2.2mA to

350µA. This is done by driving the CS, Pin 5, to below 0.2V dc. Under these conditions, the output will go into a high impedance state. In addition to lowering power consumption, this feature permits bussing the outputs of a number of AD637s to form a wide bandwidth rms multiplexer. If the chip select is not being used, Pin 5 should be tied high.

OPTIONAL TRIMS FOR HIGH ACCURACY

The AD637 includes provisions to allow the user to trim out both output offset and scale factor errors. These trims will result in significant reduction in the maximum total error as shown in Figure 4. This remaining error is due to a nontrimmable input offset in the absolute value circuit and the irreducible nonlinearity of the device.

The trimming procedure on the AD637 is as follows:

l.Ground the input signal, V IN, and adjust R1 to give 0V output from Pin 9. Alternatively R1 can be adjusted to give the correct output with the lowest expected value of V IN.

2.Connect the desired full-scale input to V IN, using either a dc or a calibrated ac signal, and trim R3 to give the correct out-put at Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a 2 V peak-to-peak sine wave should give 0.707 V dc output. Remaining errors are due to the nonlinearity.

Figure 4.Max Total Error vs. Input Level AD637K Internal and External Trims

Figure 5.Optional External Gain and Offset Trims CHOOSING THE AVERAGING TIME CONSTANT

The AD637 will compute the true rms value of both dc and ac input signals. At dc the output will track the absolute value of the input exactly; with ac signals the AD637’s output will approach the true rms value of the input.The deviation from the ideal rms value is due to an averaging error. The averaging error is comprised of an ac and dc component.Both components are functions of input sig-nal frequency f and the averaging time constant τ (τ: 25ms/µF of averaging capacitance). As shown in Figure 6, the averaging error is defined as the peak value of the ac component, ripple, plus the value of the dc error.

The peak value of the ac ripple component of the averaging

Figure 6.Typical Output Waveform for a Sinusoidal Input This ripple can add a significant amount of uncertainty to the accuracy of the measurement being made. The uncertainty can be significantly reduced through the use of a post filtering net-work or by increasing the value of the averaging capacitor.

The dc error appears as a frequency dependent offset at the output of the AD637 and follows the equation:

1

0.16+6.4τ2f2

in % of reading

Since the averaging time constant, set by C AV, directly sets the time that the rms converter “holds” the input signal during computation, the magnitude of the dc error is determined only by C AV and will not be affected by post filtering.

Figure 7.Comparison of Percent DC Error to the Percent Peak Ripple over Frequency Using the AD637 in the Stan-dard RMS Connection with a 1 ×µF C AV

The ac ripple component of averaging error can be greatly reduced by increasing the value of the averaging capacitor. There are two major disadvantages to this:first, the value of the averaging capacitor will become extremely large, and second, the settling time of the AD637 increases in direct proportion to the value of the averaging capacitor (Ts = 115 ms/µF of averag-ing capacitance). A preferable method of reducing the ripple is through the use of the post filter network, shown in Figure 8. This network can be used in either a one or two pole configura-tion. For most applications the single pole filter will give the best overall compromise between ripple and settling time.

REMOVE C3 Figure 8.Two Pole Sallen-Key Filter

Figure 9a shows values of C AV and the corresponding averaging error as a function of sine-wave frequency for the standard rms connection. The 1% settling time is shown on the right side of the graph.Figure 9b shows the relationship between averaging error, sig-nal frequency settling time, and averaging capacitor value. This graph is drawn for filter capacitor values of 3.3 times the aver-aging capacitor value. This ratio sets the magnitude of the ac and dc errors equal at 50 Hz. As an example, by using a 1µF averaging capacitor and a 3.3µF filter capacitor, the ripple for a 60Hz input signal will be reduced from 5.3% of reading using the averaging capacitor alone to 0.15% using the single pole filter. This gives a factor of thirty reduction in ripple and yet the settling time would only increase by a factor of three. The values of C AV and C2, the filter capacitor, can be calculated for the desired value of averaging error and settling time by using Figure 9b.

The symmetry of the input signal also has an effect on the mag-nitude of the averaging error. Table I gives practical component values for various types of 60 Hz input signals. These capacitor values can be directly scaled for frequencies other than 60 Hz;

i.e., for 30 Hz double these values, for 120 Hz they are halved. For applications that are extremely sensitive to ripple, the two pole configuration is suggested. This configuration will

minimize capacitor values and settling time while maximizing performance.

Figure 9c can be used to determine the required value of C AV, C2, and C3 for the desired level of ripple and settling time.

Figure 9a.

Figure 9b.

Figure 9c.

Table I.Practical Values of C AV and C2 for Various Input Waveforms

FREQUENCY RESPONSE

The frequency response of the AD637 at various signal levels is shown in Figure 10. The dashed lines show the upper frequency limits for 1%, 10%, and ±3 dB of additional error. For example, note that for 1% additional error with a 2 V rms input the high-est frequency allowable is 200 kHz. A 200 mV signal can be measured with 1% error at signal frequencies up to 100kHz.

To take full advantage of the wide bandwidth of the AD637, care must be taken in the selection of the input buffer amplifier. To ensure that the input signal is accurately presented to the converter, the input buffer must have a –3 dB bandwidth that is wider than that of the AD637. A point that should not be over-looked is the importance of slew rate in this application. For example, the minimum slew rate required for a 1 V rms 5MHz sine-wave input signal is 44V/µs. The user is cautioned that this is the minimum rising or falling slew rate and that care must be exercised in the selection of the buffer amplifier, as some ampli-fiers exhibit a two-to-one difference between rising and falling slew rates. The AD845 is recommended as a precision input buffer.

INPUT FREQUENCY – Hz

V

O

U

T

–

V

Figure 10.Frequency Response

AC MEASUREMENT ACCURACY AND CREST FACTOR Crest factor is often overlooked in determining the accuracy of an ac measurement. Crest factor is defined as the ratio of the peak signal amplitude to the rms value of the signal (CF =

Vp/V rms).Most common waveforms, such as sine and triangle waves, have relatively low crest factors (≤2). Waveforms that resemble low duty cycle pulse trains, such as those occurring in switching power supplies and SCR circuits, have high crest factors. For example, a rectangular pulse train with a 1% duty cycle has a crest factor of 10 (CF = 1η ).

PULSEWIDTH –␮s

10

1.0

0.01

11000

10

I

N

C

R

E

A

S

E

I

N

E

R

R

O

R

–

%

100

0.1

C AV = 22␮F

CF = 10

CF = 3

␩ = DUTY CYCLE =100␮s

T

CF = 1/␩

e IN(RMS) = 1 V RMS

Figure 11.AD637 Error vs. Pulsewidth Rectangular Pulse

Figure 12 is a curve of additional reading error for the AD637for a 1 volt rms input signal with crest factors from 1 to 11. A rectangular pulse train (pulsewidth 100µs) was used for this test since it is the worst-case waveform for rms measurement (all the energy is contained in the peaks). The duty cycle and peak amplitude were varied to produce crest factors from l to 10while maintaining a constant 1 V rms input amplitude.

CREST FACTOR

1.5

–1.5

1

11

2I N C R E A S E I N E R R O R – %

34

567101.0

0.5

–0.5

–

1.0

Figure 12.Additional Error vs. Crest Factor

V IN – V rms

2.01.80.0

2.0

0.5

1.0 1.5

1.20.60.40.21.61.40.81.0M A G N I T U D E O F E R R O R – % o f r m s L e v e l

CF = 10

CF = 7

CF = 3

Figure 13.Error vs. RMS Input Level for Three Common Crest Factors

CONNECTION FOR dB OUTPUT

Another feature of the AD637 is the logarithmic, or decibel,output. The internal circuit that computes dB works well over a 60dB range. The connection for dB measurement is shown in Figure 14. The user selects the 0 dB level by setting R1 for the proper 0 dB reference current (which is set to exactly cancel the log output current from the squarer/divider circuit at the desired 0dB point). The external op amp is used to provide a more convenient scale and to allow compensation of the +0.33%/°C temperature drift of the dB circuit. The special T.C. resistor R3is available from Tel Labs in Londonderry, NH (model Q-81)and from Precision Resistor Inc., Hillside, NJ (model PT146).

Figure 14.dB Connection

dB CALIBRATION 1.Set V IN = 1.00 V dc or 1.00 V rms 2.Adjust R1 for 0 dB out = 0.00 V 3.Set V IN = 0.1 V dc or 0.10 V rms 4.Adjust R2 for dB out = – 2.00 V

Any other dB reference can be used by setting V IN and R1accordingly.

LOW-FREQUENCY MEASUREMENTS

If the frequencies of the signals to be measured are below 10Hz,the value of the averaging capacitor required to deliver even 1%averaging error in the standard rms connection becomes extremely large. The circuit shown in Figure 15 shows an alternative method of obtaining low-frequency rms measurements. The averaging time constant is determined by the product of R and C AV1, in this circuit 0.5 s/µF of C AV . This circuit permits a 20:1 reduction in the value of the averaging capacitor, permitting the use of high quality tanta-lum capacitors. It is suggested that the two pole Sallen-Key filter shown in the diagram be used to obtain a low ripple level and minimize the value of the averaging capacitor.

If the frequency of interest is below 1 Hz, or if the value of the

averaging capacitor is still too large, the 20:1 ratio can be increased.This is accomplished by increasing the value of R.If this is done, it is suggested that a low input current, low offset voltage amplifier such as the AD548 be used instead of the internal buffer amplifier.This is necessary to minimize the offset error introduced by the combination of amplifier input currents and the larger resistance.

Figure 15.AD637 as a Low Frequency RMS Converter

VECTOR SUMMATION

Vector summation can be accomplished through the use of two AD637s as shown in Figure 16.Here the averaging capacitors are omitted (nominal 100 pF capacitors are used to ensure sta-bility of the filter amplifier), and the outputs are summed as shown. The output of the circuit is

V V V O X Y =+22

This concept can be expanded to include additional terms by feeding the signal from Pin 9 of each additional AD637 through a 10 k Ω resistor to the summing junction of the AD711 and tying all of the denominator inputs (Pin 6) together.

If C AV is added to IC1 in this configuration, the output is

V V X Y 22+.If the averaging capacitor is included on both

IC1 and IC2, the output will be

V V X Y 22+.

This circuit has a dynamic range of 10 V to 10 mV and is lim-ited only by the 0.5 mV offset voltage of the AD637. The useful bandwidth is 100 kHz.

Figure 16.Vector Sum Configuration

AD637

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

TO-116 Package

(D-14)

BSC

0.015 (0.38)

0.008 (0.20)

Cerdip Package

(Q-14)

BSC

SOIC Package

(R-16)

REV. F–13–

AD637REV. F

–14–Revision History

Location

Page

Data Sheet changed from REV. E to REV. F.

Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3

–15–

F

(

2

/

3

–

–

8

8

7

C

.

A

.

S

.

U

N

I

D

E

T

N

I

R

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