Boost Controller
TDA4863-2/TDA4863-2G Power-Factor Controller (PFC)
IC for High Power Factor
and Low THD
Power Management & Supply
N e v e r s t o p t h i n k i n g.
Edition 2005-02-22
Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München
© Infineon Technologies AG 1999. All Rights Reserved.
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TDA4863-2/TDA4863-2G
Revision History:2005-02-22Datasheet
Previous Version: V2.0Page
Subjects ( major changes since last revision )Update package information
TDA4863-2
Table of Contents Page
Version 2.1 322 Feb 2005
1Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.1Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.2Improvements Referred to TDA 4862 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.3Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.4Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.5Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.2IC Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.3Voltage Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.4Overvoltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.5Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.6Current Sense Comparator, LEB and RS Flip-Flop . . . . . . . . . . . . . . . . . . 102.7Zero Current Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.8Restart Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.9Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.10Gate Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.11Signal Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.2Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143.3Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.1Results of THD Measurements with Application Board P out = 110 W . . . . 225
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Version 2.1 4 22 Feb 2005
Type Ordering Code Package
TDA4863-2 Q67040-S4620 PG-DIP-8-4TDA4863-2G Q67040-S4621 PG-DSO-8-3
Power-Factor Controller (PFC) IC for High Power Factor and Low THD TDA4863-2
Final Data
Boost Controller
1
Overview
1.1
Features
•IC for sinusoidal line-current consumption •Power factor achieves nearly 1
•Controls boost converter as active harmonic filter for low THD
•Start up with low current consumption •Zero current detector for discontinuous operation mode
•Output overvoltage protection •Output undervoltage lockout •Internal start up timer • Totem pole output with active shut down • Internal leading edge blanking LEB • Pb-free lead plating ; RoHS compliant
1.2Improvements Referred to TDA 4862 and TDA 4863
• Suitable for universal input applications with low THD at low load conditions •Very low start up current
•Accurate OVR and V ISENSEmax threshold •Competition compatible V CC thresholds •Enable threshold referred to V VSENSE
•Compared to TDA4863 a bigger MOS Transistor can be driven (see 2.10)
Figure 1Typical application
1.3Description
The TDA4863-2 IC controls a boost converter in a way that sinusoidal current is taken from the single phase line supply and stabilized DC voltage is available at the output. This active harmonic filter limits the harmonic currents resulting from the capacitor pulsed charge currents during rectification. The power factor which decibels the ratio between active and apparent power is almost one. Line voltage fluctuations can be compensated very efficiently.
Version 2.1 522 Feb 20051.4Pin Configuration
Figure 2Pin Configuration of TDA4863-2
Version 2.1 6 22 Feb 2005
Pin Definitions and Functions
Pin Symbol Description
1VSENSE Voltage Amplifier Inverting Input
VSENSE is connected via a resistive divider to the boost converter
output. With a capacitor connected to VAOUT the internal error
amplifier acts as an integrator.
2VAOUT Voltage Amplifier Output
V VAOUT is connected internally to the first multiplier input. To prevent
overshoot the input voltage is clamped internally at 5 V. If V VAOUT is
less then 2.2 V the gate driver is inhibited. If the current flowing into
this pin exceeds an internal threshold the multiplier output voltage is
reduced to prevent the MOSFET from overvoltage damage.
3MULTIN Multiplier Input
MULTIN is the second multiplier input and is connected via a resistive
divider to the rectifier output voltage.
4ISENSE Current Sense Input
ISENSE is connected to a sense resistor controlling the MOSFET
source current. The input is internally clamped at -0.3 V to prevent
negative input voltage interaction. A leading edge blanking circuitry
suppresses voltage spits when turning the MOSFET on.
5DETIN Zero Current Detector Input
DETIN is connected to an auxiliary winding monitoring the zero
crossing of the inductor current.
6GND Ground
7GTDRV Gate Driver Output
GTDRV is the output of a totem-pole circuitry for direct driving a
MOSFET. Compared with TDA4863 the TDA4863-2 can drive 20A
MOSFETS. To achieve this the gate output voltage V GTL at I GT =0A has
been set to 0.85V. An active shutdown circuitry ensures that GTDRV
is set to low if the IC is switched off.
8VCC Positive Voltage Supply
If V CC excees the turn-on threshold the IC is switched on. When Vcc
falls below the turn-off threshold the IC is switched off. In switch off
mode power consumption is very low. Two capacitors should be
connected to Vcc. An electrolytic capacitor and 100nF cermanic
capacitor which is used to absorb fast supply current spikes. Make
sure that the electrolytic capacitor is discharged before the IC is
plugged into the application board.1.5Block Diagram
Figure 3Internal Bolck Diagram2Functional Description
2.1Introduction
Conventional electronic ballasts and switch mode power supplies are designed with a bridge rectifier and a bulk capacitor. Their disadvantage is that the circuit draws power from the line when the instantaneous AC voltage exceeds the capacitors voltage. This occurs near the line voltage peak and causes a high charge current spike with following characteristics: The apparent power is higher than the real power that means low power factor condition, the current spikes are non sinusoidal with a high content of harmonics causing line noise, the rectified voltage depends on load condition and requires a large bulk capacitor, special efforts in noise suppression are necessary.
With the TDA4863-2 preconverter a sinusoidal current is achieved which varies in direct instantaneous proportional to the input voltage half sine wave and so provides a power factor near 1. This is due to the appearance of almost any complex load like a resistive one at the AC line. The harmonic distortions are reduced and comply with the IEC555 standard requirements.
2.2IC Description
The TDA4863-2 contains a wide bandwidth voltage amplifier used in a feedback loop, an overvoltage regulator, an one quadrant multiplier with a wide linear operating range, a current sense comparator, a zero current detector, a PWM and logic circuitry, a totem-pole MOSFET driver, an internal trimmed voltage reference, a restart timer and an undervoltage lockout circuitry.
2.3Voltage Amplifier
With an external capacitor between the pins VSENSE and VAOUT the voltage amplifier acts like an integrator. The integrator monitors the average output voltage over several line cycles. Typically the integrator´s bandwidth is set below 20 Hz in order to suppress the 100 Hz ripple of the rectified line voltage. The voltage amplifier is internally compensated and has a gain bandwidth of 5 MHz (typ.) and a phase margin of 80 degrees. The non-inverting input is biased internally at 2.5 V. The output is directly connected to the multiplier input.
The gate drive is disabled when VSENSE voltage is less than 0.2 V or VAOUT voltage is less than 2.2 V.
If the MOSFET is placed nearby the controller switching interferences have to be taken into account. The output of the voltage amplifier is designed in a way to minimize these inteferences.2.4Overvoltage Regulator
Because of the integrator´s low bandwidth fast changes of the output voltage can’t be regulated within an adequate time. Fast output changes occur during initial start-up, sudden load removal, or output arcing. While the integrator´s differential input voltage remains zero during this fast changes a peak current is flowing through the external capacitor into pin VAOUT. If this current exceeds an internal defined margin the overvoltage regulator circuitry reduces the multiplier output voltage. As a result the on time of the MOSFET is reduced.
2.5Multiplier
The one quadrant multiplier regulates the gate driver with respect of the DC output voltage and the AC half wave rectified input voltage. Both inputs are designed to achieve good linearity over a wide dynamic range to represent an AC line free from distortion. Special efforts are made to assure universal line applications with respect to a 90 to 270 V AC range.
The multiplier output is internally clamped at 1.3 V. So the MOSFET is protected against critical operating during start up.
2.6Current Sense Comparator, LEB and RS Flip-Flop
The source current of the MOS transistor is transferred into a sense voltage via the external sense resistor. The multiplier output voltage is compared with this sense voltage. Switch on time of the MOS transistor is determined by the comparison result. To protect the current comparator input from negative pulses a current source is inserted which sends current out of the ISENSE pin every time when V ISENSE-signal is falling below ground potential. An internal RC-filter is connected to the ISENSE pin which smoothes the switch-on current spike. The remaining switch-on current spike is blanked out via a leading edge blanking circuit with a blanking time of typ. 200 ns.
The RS Flip-Flop ensures that only one single switch-on and switch-off pulse appears at the gate drive output during a given cycle (double pulse suppression).
2.7Zero Current Detector
The zero current detector senses the inductor current via an auxiliary winding and ensures that the next on-time of the MOSFET is initiated immediately when the inductor current has reached zero. This reduces the reverse recovery losses of the boost converter diode to a miniumum. The MOSFET is switched off when the voltage drop of the shunt resistor reaches the voltage level of the multiplier output. So the boost current waveform has a triangular shape and there are no deadtime gaps between the cycles. This leads to a continuous AC line current limiting the peak current to twice of the average current.To prevent false tripping the zero current detector is designed as a Schmitt-Trigger with a hysteresis of 0.5 V. An internal 5 V clamp protects the input from overvoltage breakdown, a 0.6 V clamp prevents substrate injection. An external resistor has to be used in series with the auxiliary winding to limit the current through the clamps.
2.8Restart Timer
The restart timer function eliminates the need of an oscillator. The timer starts or restarts the TDA4863-2 when the driver output has been off for more than 150 µs after the inductor current reaches zero.
2.9Undervoltage Lockout
An undervoltage lockout circuitry switches the IC on when V CC reaches the upper threshold V CCH and switches the IC off when V CC is falling below the lower threshold V CCL. During start up the supply current is less then 100 µA.
An internal voltage clamp has been added to protect the IC from V CC overvoltage condition. When using this clamp special care must be taken on power dissipation. Start up current is provided by an external start up resistor which is connected from the AC line to the input supply voltage V CC and a storage capacitor which is connected from V CC to ground. Be aware that this capacitor is discharged before the IC is plugged into the application board. Otherwise the IC can be destroyed due to the high capacitor voltage.
Bootstrap power supply is created with the previous mentioned auxiliary winding and a diode (see “Application Circuit” on Page 21).
2.10Gate Drive
The TDA4863-2 totem pole output stage is MOSFET compatible. An internal protection ciruitry is activated when V CC is within the start up phase and ensures that the MOSFET is turned off. The totem pole output has been optimized to achieve minimized cross conduction current during high speed operation.
Compared to TDA4863 a bigger MOS Transistor can be driven by the TDA4863-2. When a big MOSFET is used in applications with TDA4863, for example SPP20N60C3, the falling edge of the gate drive voltage can swing under GND and can cause false triggering of the IC. To prevent false traiggering the gate drive voltage of theTDA4863-2 at low state and gate current I GT = 0mA is set to V GTL= 0.85V (TDA4863: V GTL=0.25V). The difference between TDA4863-2 and TDA4863 is also depicted in the diagram: gate drive voltage low state on page 20.2.11Signal Diagrams
Figure 4Typical signals
3Electrical Characteristics
3.1Absolute Maximum Ratings
Parameter Symbol Limit Values Unit Remarks
min.max.
Supply + Zener Current I CCH + I Z20mA
Supply Voltage V CC-0.3V Z V V Z = Zener
Voltage
I CC+I Z = 20 mA Voltage at Pin 1,3,4-0.3 6.5
Current into Pin 2I VAOUT
-1030mA V VAOUT = 4 V,
V VSENSE = 2.8 V
V VAOUT = 0 V,
V VSENSE = 2.3 V
t < 1 ms
Current into Pin 5I DETIN
-1010DETIN > 6 V
DETIN < 0.4 V
t < 1 ms
Current into Pin 7I GTDRV-500500t < 1 ms
ESD Protection2000V MIL STD 883C
method 3015.6,
100 pF,1500 ΩStorage Temperature T stg-50150°C
Operating Junction Temperature T J-40150
Thermal Resistance Junction-Ambient R thJA100
180
K/W PG-DIP-8-4
PG-DSO-8-33.2Characteristics
Unless otherwise stated, -40°C < T j < 150°C, V CC = 14.5 V
Parameter Symbol Limit Values Unit Test Condition
min.typ.max.
Start-Up circuit
Zener Voltage V Z182022V I CC + I Z = 20 mA Start-up Supply Current I CCL20100µA V CC = V CCON -0.5 V Operating Supply Current I CCH46mA Output low
V CC Turn-ON Threshold V CCON1212.513V
V CC Turn-OFF Threshold V CCOFF9.51010. 5
V CC Hysteresis V CCHY 2.5
Voltage Amplifier
Voltage feedback Input
V FB 2.45 2.5 2.55V
Threshold
Line Regulation V FBLR5mV V CC = 12 V to 16 V Open Loop Voltage Gain1)G V100dB
Unity Gain Bandwidth1)B W5MHz
Phase Margin1)M80Degr
Bias Current VSENSE I BVSENSE-1.0-0.3µA
Enable Threshold V VSENSE0.170.20.25V
Inhibit Threshold Voltage V VAOUTI 2.1 2.2 2.3V ISENSE = -0.38 V Inhibit Time Delay t dVA3µs V ISENSE = -0.38 V Output Current Source I VAOUTH-6mA V VAOUT = 0 V
V VSENSE = 2.3 V,
t < 1 ms
Output Current Sink I VAOUTL30V VAOUT = 4 V
V VSENSE = 2.8 V,
t < 1 ms
Upper Clamp Voltage V VAOUTH 4.8 5.4 6.0V V VSENSE = 2.3 V,
I VAOUT = -0.2 mA Lower Clamp Voltage V VAOUTL0.8 1.1 1.4V V VSENSE = 2.8 V,
I VAOUT = 0.5 mA
1)Guaranteed by design, not tested
Overvoltage Regulator Threshold Current I OVR
35
40
45
µA
T j = 25°C , V VAOUT = 3.5 V Current Comparator Input Bias Current I BISENSE -1
-0.21
µA V ISENSE = 0 V Input Offset Voltage (T j = 25 °C)
V ISENSEO 25mV V VAOUT = 2.7 V V MULTIN = 0 V Max Threshold Voltage V ISENSEM 0.95 1.0 1.05V
Threshold at OVR V ISENOVR 0.05I OVR = 50 µA
Leading Edge Blanking t LEB 100200300ns Shut Down Delay t dISG
80
130Detector
Upper Threshold Voltage V DETINU 1.5 1.6V Lower Threshold Voltage V DETINL 0.95 1.1Hysteresis V DETINHY 0.25
0.40.55Input Current I BDETIN
-1-0.21µA V DETIN = 2 V
Input Clamp Voltage High State Low State
V DETINHC V DETINLC
4.5 0.1
4.9 0.4
5.3 0.7V
I DETIN = 5 mA I DETIN = -5 mA
Multiplier Input bias current I BMULTIN -1
-0.21
µA V MULTIN = 0 V Dynamic voltage range MULTIN
V MULTIN 0 to 4V
V VAOUT = 2.75 V Dynamic voltage range VAOUT V VAOUT
V FB to V FB +1.5V MULTIN = 1 V
Multiplier Gain
K low
K high
0.3 0.7
V VAOUT < 3 V, V MULTIN = 1 V V VAOUT > 3.5V, V MULTIN = 1 V
K = delta V ISENSE / d elta V VAOUT at V MULTIN = constant
3.2
Characteristics (cont’d)
Unless otherwise stated, -40°C < T j < 150°C, V CC = 14.5 V
Parameter
Symbol
Limit Values Unit
Test Condition
min.
typ.max.
Restart Timer Restart time t RES
100
160250
µs Gate Drive
Gate drive voltage low state
V GTL 0.85V I GT = 0 mA V GTL 1.0V
I GT = 2 mA 1.7I GT = 20 mA 2.2
I GT = 200 mA Gate drive voltage high state V GTH
10.8
I GT = -5 mA, see “Gate Drive Voltage High State versus V cc ” on Page 20
Output voltage active shut down V GTSD 1 1.25I GT = 20 mA, V CC = 9 V Rise time t rise 80130ns
C GT = 4.7 nF V GT = 2...8 V
Fall time
t fall
55
130
3.2
Characteristics (cont’d)
Unless otherwise stated, -40°C < T j < 150°C, V CC = 14.5 V
Parameter
Symbol
Limit Values Unit
Test Condition
min.
typ.max.
3.3Electrical Diagrams
I cc versus V cc
00,51
1,522,533,544,5
50
5
1015
20
Vcc/V
I c c / m A
I ccl versus V cc
05
1015202530354045500
2
4
6
8
10
12
14
16
Vcc / V
I c c l / u A
V CCON/OFF
versus Temperature
78
9
10
11
12
13
14
-40
40
80
120
160
Tj / °C
V c c /
V
I CCL versus Temperature, V CC = 10 V
-40
4080
120
160
Tj / °C
I C C L / u A
V FB versus Temperature (pin1 connected to pin2)
2,45
2,462,47
2,482,492,5
2,512,522,532,542,55-40
40
80
120
160
Tj / °C
V F B / V
Overvoltage Regulator V ISENSE versus Threshold Voltage
00,2
0,4
0,6
0,81
1,2
35
37
39
41
43
45
Iovp / uA
V I S E N S E / V
Open Loop Gain and Phase versus Frequency
020
40
60
80
100
120
f/kHz
20
40
6080
100120140160
180Phi/deg G V /dB Leading Edge Blanking versus Temperature
050
100
150
200
250
300
-40
04080120160
Tj / °C
L E B / n s
1
2
3
4
V MULTIN / V Restart Time versus Temperature
100
120
140
160
180
200
220
-40
4080
120
160
Tj / °C
t r s t / u s
2,5
3
3,5
4
4,5V VAOUT / V
Electrical Characteristics
Gate Drive Rise Time and Fall Time versus Temperature
Gate Drive Voltage High State versus V cc
020*********
120140-40
04080120160
Tj / °C
r i s e t i m e / n s
8
8,599,51010,511
11,5
12111315
Vcc / V
V G T H / V
Figure5P out = 110 W, Universal Input V in = 90-270V AC4.1Results of THD Measurements with Application Board P out = 110 W (Measurements according to IEC61000-3-2.
150% limit (red line): Momentary measured value must be below this limit.
100% limit (blue line): Average of measured values must be below this limit.
The worst measured momentary value is shown in the diagrams.)
Figure 6THD Class C:
P max = 110 W, V inac = 90 V, I out = 250 mA, V out = 420 V, PF = 0.998
Figure 7THD Class C:
P max = 110 W, V inac = 220 V, I out = 250 mA, V aout = 420 V, PF = 0.992
Figure 8THD Class C:
= 420 V, PF = 0.978
P max = 110 W, V inac = 270 V, I out = 250 mA, V aout
P max = 110 W, V inac = 90 V, I out = 140 mA, V aout = 420 V, PF = 0.999
Figure 10THD Class C:
P max = 110 W, V inac = 220 V, I out = 140 mA, V aout = 420 V, PF = 0.975
Figure 11THD Class C:
P max = 110 W, V inac = 270 V, I out = 140 mA, V aout = 420 V, PF = 0.883
5Package Outlines
Figure 12
Figure 13
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